Description
Loop48 parked SKT-0087.04 (DCGM exporter): GPUOperatingPoints carries no requested/achieved clocks and no active thermal or power limiter, so DCGM clock-event flags and violation durations have no causal source. Add that model to the shared pure GPU physics seam (internal/fixture), additive only. Diagnosis: codex/scratch/loop48/I04-resolution/ and codex/packets-2026-10-03-loop48/contracts/dcgm-rev3.md.
Acceptance Criteria
- #1 A design for requested/achieved SM and memory clocks and an active-limiter state (thermal, power, none) is frozen after one independent challenge, citing the DCGM 4.6.1/exporter 4.8.4 contract and the captured H100 SXM driver 595.91.07 profile for every vendor-facing value
- #2 The model is additive in internal/fixture: existing pcie, nvl72 and hgx fixture output is byte-identical (the existing hgx compatibility test passes unchanged)
- #3 A limiter is active only when its causal input crosses the sourced limit; boundary equality and CoolingDerate alone never activate it, with fail-first tests for each
- #4 Unsupported products and drivers return a nullable limit and no activation, fail closed
Definition of Done
- #1 just check (fmt-check, lint, gen-check, env-check, docs-check, test, race, hygiene, ui-check, compose-check, helm-test, lab-check, signal-fidelity)
- #2 just gen (only if a blueprint field, construct/workload config struct, or a skill under plugins/synthkit/skills/ changed)
- #3 just dump — inventory diffed against signals/
Implementation Plan
Freeze after independent challenge: new additive pure constraint API and separate driver-scoped profile; preserve existing GPUOperatingPoints output byte-identical. Explicit per-GPU requested clocks, unconstrained power demand and synthetic thermal/power clock caps; never infer a vendor response curve. H100 SXM driver 595.91.07 only: max SM 1980 MHz, memory 2619 MHz, power ceiling 700 W and configurable floor 200 W; thermal slowdown activates only on temperature strictly above sourced 89 C and a reducing cap. Equality, 87 C operating reference and CoolingDerate alone cannot activate. Power requires unconstrained demand strictly above configured limit and reducing cap. Both causes may coexist; unsupported profiles have nullable limits and no activation. Validate provenance through existing physics call, inputs, coverage and unavailable GPU state. Preserve legacy compatibility fixtures. Prove fail-first threshold/cap/unsupported cases, public API and unchanged legacy output; review final implementation and full gate.
Implementation Notes
2026-10-14 independent design challenge accepted with correction: use captured slowdown threshold 89 C, not max-operating reference 87 C; explicit matching driver profile required; no alterations to existing serialized snapshot. Request/caps are declared simulation inputs, not vendor facts. Vendor envelope from accepted DCGM 4.6.1/exporter 4.8.4 H100 capture contract.
Implementation candidate uses three additive files and leaves old physics/catalogue output unchanged. Independent review initially misread pointer slice as value slice; verified Nodes is []*GPUNode and reviewer withdrew finding, final no actionable findings. Public boundary test and configured-budget cases pass; unchanged full HGX legacy proof passes. Await composed gate and CodeRabbit before integration.
Final local composed gate did not pass: unchanged control-dashboard race proof reached its 600-second timeout while host load was 255.01. Ordinary tests and focused new fixture/legacy compatibility proofs passed. Final static/schema/docs/chart checks passed. Awaiting owner decision on CI-first landing; no local full-gate pass claimed.
Owner approved CI-first testing on 2026-10-14. The failed local full gate remains failed evidence. Land the reviewed candidate and require all required CI jobs to pass on its exact commit before closure.
Final Summary
Implemented the additive H100 SXM/595.91.07 clock constraint API with strict causal thresholds, explicit synthetic caps and absent unsupported profiles. Existing physics output and HGX compatibility proof remain unchanged. Design challenge, independent review, CodeRabbit and focused fail-first proofs passed. Landed in 0223ed4b97214684f337576c28498be61926ae0f; exact CI 38644699566 passed all 11 required jobs, including race and e2e. The local full-gate timeout remains failed evidence under the owner-approved CI-first exception; local DoD 1 is intentionally unchecked. Schema regeneration was not required for this pure fixture API. No GPU telemetry consumer or live hardware deployment is claimed.